Deep Si etching for TSV via hole fabrication

Fabricating via holes for Through-Silicon Via (TSV) requires precision etching with specific characteristics to ensure performance and reliability:

1. 1. No undercut below the mask: Prevents insulation layer deposition issues on sidewalls.
   2. Smooth, tapered sidewalls: Improves step coverage for diffusion barriers and copper seed layers during sputtering.
   3. Reduced scallop size: Minimizes leakage risks caused by copper plug peeling or delamination.
   4. Rounded bottom corners: Avoids electric field concentration, reducing breakdown risks.

Samco’s silicon Deep Reactive Ion Etching (DRIE) technologies meet these requirements, enabling advanced 3D IC integration. The process delivers deep via holes with profile control from vertical to tapered, no undercut, and smooth sidewalls, utilizing Samco’s unique scallop reduction technique. These improvements reduce resistance and signal loss, enhancing TSV performance and reliability.