Si DRIE (Deep Reactive Ion Etching) for MEMS and TSV

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The Bosch Process

Samco was the first Japanese semiconductor process equipment manufacturer to offer Deep Reactive Ion Etching (DRIE or Deep RIE) systems using the Bosch Process for MEMS and TSV fabrication.

The Bosch Process is a high-aspect ratio etching technology, which repeats the cycle of isotropic etching followed by protection film deposition. The SF₆ plasma cycle etches silicon, and the C₄F₈ plasma cycle creates a protection layer. Combining this process technique with our latest system technology has produced industry leading results for both research and manufacturing customers.

Samco’s Process Capabilities

Smooth Sidewalls Process

100nm Scallop Size

Scallops are formed during the switch from etch to deposition cycles of the silicon Bosch Process. Slow-speed gas switching can result in large scallops and rough sidewalls, and they deteriorate device performance. Samco has developed a smooth sidewall process using 0.1 second high-speed gas switching so that the scallop size is controlled to less than 5 nm while still retaining an etch rate of 2 μm/min. This process is applicable to Cu metallization of Through Silicon Via (TSV) and nanoimprint mold fabrication.

Ultra Deep Tapered Etching

0µm Deep

0Aspect Ratio

0Selectivity (Si/PR)

One of the challenges in deep silicon etching is reliable profile control. Bowing and side-etch caused by protection film break are typical failure in Si deep hole etching.
This 400 µm deep tapered profile (ø 15 µm) was fabricated with process optimization. The profile shows aspect ratio of 27, and tilt is controlled within 90 ° +/- 0.3 ° .

High Etch Rate

0µm/min

An etch rate of 55 µm/min is achieved using an efficient ICP RF power source and improved pumping dynamics.
The pattern width is 50 µm.

DRIE High Etch Rate

Tilt Free Process

0deg Vertical Profile

In the Bosch process, at the edge of a wafer, the etch profile can become “tilted”. Precise tilt control is critical in some applications such as TSV fabrication. A tilt angle of just 1° could result in the misalignment of a 200 μm thick TSV by as much as 2 μm. Samco has developed tilt-free processes for both ø6″ and 8”wafers.

Tilt Free DRIE Process

High Aspect Ratio

0Aspect Ratio

Aspect ratio of 40 is achieved.
(pattern width: 2.5µm, etch depth: 100 µm)
In this process, the scallop size is controlled to less than 100 nm.

DRIE High Aspect Ratio

Notch Free Silicon On Insulator (SOI) Etching

Insulating layers of SOI substrates are widely used for a silicon etch stop

in MEMS device fabrication.
The standard Bosch Process causes undesirable notching at the silicon/insulation interface due to electrical charging. Samco has developed a unique notch-free SOI etching process that maintains the etch selectivity by using superimposed Radio Frequency (RF) power.